About the role
ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future. Whether you’re designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger — technology that moves the world forward. Join us and, together, we’ll advance your career. THE ROLE:As Product Development Engineer specializing in System Level Test (SLT), you will own hands-on debug execution across product bring-up, production ramp, and sustaining support. This role requires strong technical depth in SLT flows, platform enablement, diagnostics, BIOS/OS/firmware interactions, failure triage, and data-driven issue resolution to drive products from first silicon readiness through stable manufacturing execution.The successful candidate will serve as a primary technical owner for SLT debug, working closely with Product Engineering, Test Engineering, Platform, Diagnostics, Design, Quality, Operations, Manufacturing, and OSAT partners to isolate issues, drive containment and corrective actions, and ensure timely readiness for release and sustaining needs. The ideal candidate is a strong hands-on problem solver who can connect system-level failures to actionable engineering paths and maintain execution discipline across multiple products and debug priorities. KEY RESPONSIBILITIES:Own SLT debug execution across bring-up, production ramp, and sustaining phases, ensuring issues are triaged, contained, and driven to closureDrive structured debug of SLT failures across test content, test flow, platform, diagnostics, BIOS/OS/firmware, hardware, and manufacturing interactionsLead first-pass triage, failure reproduction, isolation experiments, data collection, and issue characterization to identify root cause and next-step ownershipPartner with Product Engineering, Test Engineering, Platform, Diagnostics, Design, Quality, Operations, Manufacturing, and OSAT teams to resolve product and flow readiness blockersAnalyze yield, failure pareto, first-test-rate, repeatability, coverage, and test time data to identify debug priorities, execution risks, and improvement opportunitiesSupport SLT bring-up readiness by validating test flows, platform stability, diagnostics availability, data logging, automation, and release package completenessDrive debug closure for production excursions, yield loss, test escapes, flow instability, hardware interactions, and OSAT execution issuesDocument debug findings, containment actions, root-cause status, lessons learned, and recommended flow or coverage improvementsCommunicate debug status, risks, blockers, and recovery plans clearly to technical leads, program stakeholders, and cross-functional partners PREFERRED EXPERIENCE:5~10 years’ experience in Product Development Engineering.Hands-on experience in System Level Test, Product Engineering, Test Engineering, platform validation, silicon debug, or manufacturing test supportStrong experience owning debug activities during silicon bring-up, qualification readiness, production ramp, and sustaining supportPractical knowledge of SLT test flows, diagnostics, BIOS/OS/firmware dependencies, platform readiness, failure logging, automation, and release package validationDemonstrated ability to isolate complex system-level failures using structured experiments, data analysis, reproduction methods, and cross-functional debug plansStrong understanding of yield, failure pareto, first-test-rate, repeatability, test time, coverage, and quality metrics used to guide product and manufacturing decisionsAbility to work effectively with Product Engineering, Test Engineering, Platform, Diagnostics, Design, Quality, Operations, Manufacturing, and OSAT partners to close debug issuesStrong communication skills with the ability to summarize debug status, risks, blockers, root-cause progress, and recovery actions clearly and conciselyAbility to operate with ownership, urgency, and technical discipline in a fast-paced environment with parallel bring-up, and sustaining priorities ACADEMIC CREDENTIALS:BS/MS in Electrical / Electronics Engineering, Computer Engineering, or comparable disciplines LOCATION:Hsinchu, Taiwan#LI-JW3 Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy. THE ROLE:As Product Development Engineer specializing in System Level Test (SLT), you will own hands-on debug execution across product bring-up, production ramp, and sustaining support. This role requires strong technical depth in SLT flows, platform enablement, diagnostics, BIOS/OS/firmware interactions, failure triage, and data-driven issue resolution to drive products from first silicon readiness through stable manufacturing execution.The successful candidate will serve as a primary technical owner for SLT debug, working closely with Product Engineering, Test Engineering, Platform, Diagnostics, Design, Quality, Operations, Manufacturing, and OSAT partners to isolate issues, drive containment and corrective actions, and ensure timely readiness for release and sustaining needs. The ideal candidate is a strong hands-on problem solver who can connect system-level failures to actionable engineering paths and maintain execution discipline across multiple products and debug priorities. KEY RESPONSIBILITIES:Own SLT debug execution across bring-up, production ramp, and sustaining phases, ensuring issues are triaged, contained, and driven to closureDrive structured debug of SLT failures across test content, test flow, platform, diagnostics, BIOS/OS/firmware, hardware, and manufacturing interactionsLead first-pass triage, failure reproduction, isolation experiments, data collection, and issue characterization to identify root cause and next-step ownershipPartner with Product Engineering, Test Engineering, Platform, Diagnostics, Design, Quality, Operations, Manufacturing, and OSAT teams to resolve product and flow readiness blockersAnalyze yield, failure pareto, first-test-rate, repeatability, coverage, and test time data to identify debug priorities, execution risks, and improvement opportunitiesSupport SLT bring-up readiness by validating test flows, platform stability, diagnostics availability, data logging, automation, and release package completenessDrive debug closure for production excursions, yield loss, test escapes, flow instability, hardware interactions, and OSAT execution issuesDocument debug findings, containment actions, root-cause status, lessons learned, and recommended flow or coverage improvementsCommunicate debug status, risks, blockers, and recovery plans clearly to technical leads, program stakeholders, and cross-functional partners PREFERRED EXPERIENCE:5~10 years’ experience in Product Development Engineering.Hands-on experience in System Level Test, Product Engineering, Test Engineering, platform validation, silicon debug, or manufacturing test supportStrong experience owning debug activities during silicon bring-up, qualification readiness, production ramp, and sustaining supportPractical knowledge of SLT test flows, diagnostics, BIOS/OS/firmware dependencies, platform readiness, failure logging, automation, and release package validationDemonstrated ability to isolate complex system-level failures using structured experiments, data analysis, reproduction methods, and cross-functional debug plansStrong understanding of yield, failure pareto, first-test-rate, repeatability, test time, coverage, and quality metrics used to guide product and manufacturing decisionsAbility to work effectively with Product Engineering, Test Engineering, Platform, Diagnostics, Design, Quality, Operations, Manufacturing, and OSAT partners to close debug issuesStrong communication skills with the ability to summarize debug status, risks, blockers, root-cause progress, and recovery actions clearly and conciselyAbility to operate with ownership, urgency, and technical discipline in a fast-paced environment with parallel bring-up, and sustaining priorities ACADEMIC CREDENTIALS:BS/MS in Electrical / Electronics Engineering, Computer Engineering, or comparable disciplines LOCATION:Hsinchu, Taiwan#LI-JW3 Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy.