About the role
ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future. Whether you’re designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger — technology that moves the world forward. Join us and, together, we’ll advance your career. THE ROLE:We are looking for an outstanding candidate to provide technical leadership for load store verification execution for our next generation products. You will maintain and improve existing functional verification methodology, improve existing infrastructure, and work on related projects and/or assignments as needed to meet team goals. Additionally, you will perform project definition, training and documentation. Finally, you will work with architects and TG/PG RTL/Designers and develop an effective working relationship with parties involved.If this sounds like you, we welcome you to apply! THE PERSON:The ideal candidate will have good communication skills and the ability to work with a team with varied strengths. KEY RESPONSIBILITIES:Perform functional feature verification of high speed Microprocessor designs, including development of infrastructure, directed and random test suites at behavioral RTL level across SoC, Core and block hierarchiesDevelop environments, infrastructure and test plans to accommodate both full chip and stand alone block level verification and debug capabilities using simulation tools, debug tools and programming skills, based on in-depth understanding of the architecture and HDL/logical design of the microprocessorDevelop an automated regression infrastructure setup for functional verification of high speed microprocessor designs. Based on thorough understanding of the design architecture, develop, run and debug x86 assembly based directed tests and random exercisers to validate functionality and testability operation of the microprocessor design C/C++/Perl/assembly programming, logic design and simulation skillsResolve all simulation discrepancies and assertion responses for both behavioral and gate level logic models. Measure and analyze coverage results and take vital actions to fill in coverage holesWill support next-gen LSDC rewritePREFERRED EXPERIENCE:Outstanding foundation in CPU ArchitectureSignificant expertise in Load store verification executionIndustry experience as a technical Leader for load store verificationUnderstanding or technical expertise in functional verification of microprocessor designsExperience with Verilog/SystemVerilog HDL, programming in Perl, C/C++Logic simulation experience is a big plusDirect experience with Verilog simulators is a plus.Strong understanding of computer architecture and assembly programmingACADEMIC CREDENTIALS:BS or MS with significant industry experience desired (all degrees are related to CS or EE).LOCATION:Fishkill, NY This role is not eligible for Visa Sponsorship #LI-AJ1 Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy. THE ROLE:We are looking for an outstanding candidate to provide technical leadership for load store verification execution for our next generation products. You will maintain and improve existing functional verification methodology, improve existing infrastructure, and work on related projects and/or assignments as needed to meet team goals. Additionally, you will perform project definition, training and documentation. Finally, you will work with architects and TG/PG RTL/Designers and develop an effective working relationship with parties involved.If this sounds like you, we welcome you to apply! THE PERSON:The ideal candidate will have good communication skills and the ability to work with a team with varied strengths. KEY RESPONSIBILITIES:Perform functional feature verification of high speed Microprocessor designs, including development of infrastructure, directed and random test suites at behavioral RTL level across SoC, Core and block hierarchiesDevelop environments, infrastructure and test plans to accommodate both full chip and stand alone block level verification and debug capabilities using simulation tools, debug tools and programming skills, based on in-depth understanding of the architecture and HDL/logical design of the microprocessorDevelop an automated regression infrastructure setup for functional verification of high speed microprocessor designs. Based on thorough understanding of the design architecture, develop, run and debug x86 assembly based directed tests and random exercisers to validate functionality and testability operation of the microprocessor design C/C++/Perl/assembly programming, logic design and simulation skillsResolve all simulation discrepancies and assertion responses for both behavioral and gate level logic models. Measure and analyze coverage results and take vital actions to fill in coverage holesWill support next-gen LSDC rewritePREFERRED EXPERIENCE:Outstanding foundation in CPU ArchitectureSignificant expertise in Load store verification executionIndustry experience as a technical Leader for load store verificationUnderstanding or technical expertise in functional verification of microprocessor designsExperience with Verilog/SystemVerilog HDL, programming in Perl, C/C++Logic simulation experience is a big plusDirect experience with Verilog simulators is a plus.Strong understanding of computer architecture and assembly programmingACADEMIC CREDENTIALS:BS or MS with significant industry experience desired (all degrees are related to CS or EE).LOCATION:Fishkill, NY This role is not eligible for Visa Sponsorship #LI-AJ1 Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy.